TSMC technology roadmap: 2nm 3nm technology will be launched on time

Use wechat scan QR code to share with friends and circle of friends April 27 news, < a target = "_ blank" href=" https://news.163.com/news/search?keyword=%E5%8F%B0%E7%A7%AF%E7%94%B5 "> TSMC < / a > recently updated its process roadmap, saying that its 4nm process < a target ="_ blank" href=" https://news.163.com/news/search?keyword=%E8%8A%AF%E7%89%87 "> the chip < / a > will enter the stage of" risk production "by the end of 2021 and achieve mass production in 2022; 3 nano products are expected to be put into production in the second half of 2022, and 2 nano process is under development in terms of production capacity, no competitor can threaten the dominant position of TSMC, and it will not in the next few years. As for manufacturing technology, TSMC recently reiterated that it is confident that its 2 nm (N2), 3 nm (N3) and 4 nm (N4) processes will be launched on time, and that it will maintain a leading edge in node technology over its competitors earlier this year, TSMC significantly increased its capital expenditure budget for 2021 to US $25 billion to US $28 billion, and recently increased it to about US $30 billion. This is part of TSMC's plan to increase production capacity and R & D investment in the next three years, with a total investment of US $100 billion about 80% of TSMC's $30 billion capital budget this year will be used to expand the production capacity of advanced technologies, such as 3nm, 4nm, 5nm, 6nm and 7Nm chips. Analysts at Huaxing securities believe that by the end of this year, most of the funds on advanced nodes will be used to expand TSMC's 5nm capacity to 110000-120000 wafers per month At the same time, TSMC said that 10% of its capital expenditure will be used for advanced packaging and mask manufacturing, and the other 10% will be used to support professional technology development, including customized versions of mature nodes TSMC's recent move to increase its capital expenditure is in < a target = "_ blank" href=" https://news.163.com/news/search?keyword=%E8%8B%B1%E7%89%B9%E5%B0%94 "> Intel < / a > announced its IDM 2.0 strategy (involving in-house production, outsourcing and OEM operations), and largely reiterated the company's confidence in the short-term and long-term future at a time of increased competition in a recent conference call with analysts and investors, Wei Zhejia, President and CEO of TSMC, said: "as a leading wafer foundry, TSMC has never lacked competition in its more than 30 years of history, but we know how to compete. We will continue to focus on providing leading technology, excellent manufacturing services and winning customers' trust. Among them, it is very important to win the trust of customers, because we have no internal products to compete with customers. " TSMC is the first company to start using its N5 technology for large-scale chip manufacturing (HVM) in mid-2020. Initially, the node was only used to serve TSMC's most important customers, namely apple and Hisilicon. Today, as more customers are ready for their N5 chip designs, the adoption of this node is growing. At the same time, TSMC said it had more customers planning to use N5 series technology, including N5, n5p and N4, than it had expected a few months ago Wei Zhe Jia said: "N5 has entered the second year of mass production, and the production is higher than our original plan. In smartphone and HPC (< a target = "_ blank" href=" https://news.163.com/news/search?keyword=HPC Driven by the application of "> HPC < / a >), the demand for N5 continues to be strong. We expect that N5 will contribute about 20% of the wafer revenue in 2021. In fact, we are seeing more and more N5 and N3 customers. The demand is so high that we have to be prepared to deal with it. " for TSMC, HPC applications include many different types of products, such as AI accelerator, CPU, GPU, FPGA, NPU and video game SOC. As TSMC is only an OEM manufacturer, it will not disclose which kind of node it uses to produce products, but the fact that the N5 adoption rate in the HPC field is growing is very important "We expect that the demand for our N5 series will continue to grow in the next few years, driven by the strong demand for smartphones and HPC applications," Wei said. We expect HPC to emerge not only in the first wave of growth, but also in more demand waves to support our leading N5 nodes in the future. " it is not particularly surprising that TSMC N5 is gaining market share among the top technology adopters. Huaxing capital analysts estimate that TSMC N5's < a target = "_ blank" href=" https://news.163.com/news/search?keyword=%E6%99%B6%E4%BD%93%E7%AE%A1 "> transistor < / a > density is about 170 million transistors per square millimeter, which will make it the highest density technology available today. In contrast, Samsung's 5lpe can hold about 125 to 130 million transistors per square millimeter, while Intel's 10nm node transistor density is about 100 million transistors per square millimeter in the next few weeks, TSMC will start manufacturing chips using its improved N5 technology called n5p, which promises to increase frequency by up to 5% or reduce power consumption by up to 10%. N5p provides a seamless migration path for customers, without a lot of engineering resource investment or longer design cycle, so any user using N5 design can use n5p. For example, early adopters of N5 can reuse their IP for n5p chips N4 will be put into mass production next year TSMC's N5 series technology also includes N4 process chips that will enter the "risk production" stage later this year and will be used for mass production in 2022. This technology will provide more PPA (power, performance, area) advantages than N5, but maintain the same design rules, design infrastructure, spice simulator and IP. At the same time, because N4 further expands the use range of EUV lithography tools, it also reduces the number of masks, process steps, risks and costs "N4 will take advantage of the strong foundation of N5 to further expand our advantages in 5-nanometer series technology," Wei said. N4 is directly migrated from N5, which has compatible design rules and provides further performance, power and density enhancement for the next wave of 5nm products. N4's goal is to enter the stage of risk production in the second half of this year and achieve mass production by 2022. " when N4 products are put into mass production in 2022, TSMC will have about two years of N5 experience and three years of EUV experience. Therefore, the expectation is that the yield will be very high. But even if N4 is considered cutting-edge, it won't be the most advanced manufacturing technology TSMC will offer next year N3 will appear in the second half of 2022

In 2022, TSMC will launch its new N3 manufacturing process, which will continue to use FinFET transistors, but is expected to provide a complete set of PPA improvement programs. In particular, compared with the current N5 process, TSMC's N3 promises to improve performance by 10% - 15%, or reduce power consumption by 25% - 30%. At the same time, according to the different structure, the new node will also increase the transistor density by 1.1 to 1.7 times N3 will further increase the number of EUV layers, but will continue to use DUV lithography. In addition, since FinFET is always used in this technology, it will not need to redesign a new generation of electronic design automation (EDA) tools and develop a new IP from scratch, which may be more competitive than Samsung's 3gae based on gaafet / mbcfet Wei said: "N3 will be another comprehensive node leap after N5. It will use FinFET transistor structure to provide our customers with the best technology maturity, performance and cost. Our N3 technology development is progressing well. Compared with N5 and N7, we continue to see that N3 has much higher customer engagement in HPC and smartphone applications. " In fact, TSMC claims that its customers' participation in N3 is getting higher and higher, which indirectly shows that it has high hopes for N3. "N3's risk production is expected to start in 2021, and its mass production target is in the second half of 2022," Wei said. Our N3 technology will become the most advanced foundry technology in PPA and transistor technology. We are confident that our N5 and N3 will become the node technology of TSMC for large-scale and long-term use. " surpassing N3 all gate field effect transistor (gaafet) is still an important part of TSMC's development roadmap. The company expects to use new transistors in its "post-n3" technology (probably N2). In fact, TSMC is in the stage of looking for the next generation of materials and transistor structures, which will be used in many years in the future TSMC said in its latest annual report: "for advanced CMOS (complementary metal oxide semiconductor), TSMC's 3 nm and 2 nm CMOS nodes are progressing smoothly on the pipeline." In addition, TSMC's enhanced exploratory R & D work focuses on 2-nanometer nodes, 3D transistors, new memories and low-r interconnection, which are laying a solid foundation for the introduction of many technology platforms it is worth noting that TSMC is expanding its R & D capacity in plant 12, and is currently developing N3, N2 and more advanced nodes In general, TSMC believes that its "everyone's foundry" strategy will further increase its scale, market share and sales. The company also expects to maintain its technology leadership in the future, which is critical to its growth in a recent conference call with analysts and investors, TSMC chief financial officer Huang Wende said: "we now forecast that the growth rate of OEM industry will be about 16% in 2021. For TSMC, we are confident that we can surpass the overall growth of the wafer foundry industry and achieve a growth rate of about 20% in 2021. " the company has a strong technology roadmap and will continue to roll out frontier nodes for improvement every year to provide customers with technology improvement at a predictable pace TSMC knows how to compete with competitors with cutting-edge nodes and chip manufacturers focusing on professional process technology, so it does not consider Intel foundry services (IFS) as a direct threat, especially because the latter mainly focuses on cutting-edge and advanced nodes financial analysts generally agree with TSMC's optimistic attitude, mainly because it is expected that the company's N3 and N5 nodes will not have competitors providing similar transistor density and wafer capacity Huaxing securities analyst said: "after Intel announced the return of wafer foundry business in March this year, TSMC is willing to formulate a three-year capital expenditure and R & D investment plan of $100 billion from 2021, which shows that it is confident to expand its foundry leadership. We believe that with the emergence of N3 and N5, TSMC's strategic value is also rising: N5 production activities of HPC and smartphone applications are strong, and N3 customers are more involved than N5 and N7 at similar stages” （ Small) <-- EndFragment-->

2023-03-22 10:04:32

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